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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order Number: MC100ES8111/D Rev 0, 06/2002
Preliminary Information
Low Voltage 1:10 Differential HSTL Clock Fanout Buffer
The Motorola MC100ES8111 is a bipolar monolithic differential clock fanout buffer. Designed for most demanding clock distribution systems, the MC100ES8111 supports various applications that require the distribution of precisely aligned differential clock signals. Using SiGe technology and a fully differential architecture, the device offers very low skew outputs and superior digital signal characteristics. Target applications for this clock driver are high performance clock distribution in computing, networking and telecommunication systems.
MC100ES8111
LOW-VOLTAGE 1:10 DIFFERENTIAL HSTL CLOCK FANOUT DRIVER
* * * * * * * * *
Features: 1:10 differential clock fanout buffer 50 ps maximum device skew1 SiGe technology Supports DC to 400 MHz operation1 of clock or data signals 1.5V HSTL compatible differential clock outputs PECL and HSTL compatible differential clock inputs 3.3V power supply for device core, 1.5V or 1.8V HSTL output supply Supports industrial temperature range Standard 32 lead LQFP package
FA SUFFIX 32-LEAD LQFP PACKAGE CASE 873A
Functional Description The MC100ES8111 is designed for low skew clock distribution systems and supports clock frequencies up to 400 MHz1. The device accepts two clock sources. The CLK0 input accepts HSTL compatible signals and CLK1 accepts PECL compatible signals. The selected input signal is distributed to 10 identical, differential HSTL compatible outputs. In order to meet the tight skew specification of the device, both outputs of a differential output pair should be terminated, even if only one output is used. In the case where not all 10 outputs are used, the output pairs on the same package side as the parts being used on that side should be terminated. The HSTL compatible output levels are generated with an open emitter architecture. This minimizes part-to-part and output-to-output skew. The open-emitter outputs require a 50 DC termination to GND (0V). The output supply voltage can be either 1.5V or 1.8V, the core voltage supply is 3.3V. The output enable control is synchronized internally preventing output runt pulse generation. Outputs are only disabled or enabled when the outputs are already in logic low state (true outputs logic low, inverted outputs logic high). The internal synchronizer eliminates the setup and hold time requirements for the external clock enable signal. The device is packaged in a 7x7 mm2 32-lead LQFP package.
This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice. 1. AC specifications are design targets and subject to change
(c) Motorola, Inc. 2002
MC100ES8111
Q3 Q3 Q4 Q4 Q5 Q5 Q6 18 Q6 17 16 15 14 13 VCC0 Q7 Q7 Q8 Q8 Q9 Q9 VCCO 12 11 10 9 1 2 3 4 5 6 7 8 GND
Q0 Q0
VCC
24 VCCO Q2 Q2 Q1 Q1 Q0 Q0 VCCO 25 26 27 28
23
22
21
20
19
CLK0 CLK0 0 1
Q1 Q1 Q2 Q2 Q3 Q3 Q4 Q4
VCC
OE
Q5 Q5 Q6 Q6 Q7 Q7 Q8 Q8 Q9 Q9
MC100ES8111
29 30 31 32
CLK1 CLK1
CLK_SEL
CLK_SEL
CLK0
CLK0
CLK1 1
Figure 1. MC100ES8111 Logic Diagram Table 1. PIN CONFIGURATION
Pin CLK0, CLK0 CLK1, CLK1 CLK_SEL OE Q[0-9], Q[0-9] GND VCC VCCO I/O Input Input Input Input Output Supply Supply Supply HSTL PECL LVCMOS LVCMOS ECL/PECL Type
Figure 2. 32-Lead Package Pinout (Top View)
Function Differential HSTL reference clock signal input Differential PECL reference clock signal input Reference clock input select Output enable/disable. OE is synchronous to the input reference clock which eliminates possible output runt pulses when the OE state is changed. Differential clock outputs Negative power supply Positive power supply of the device core (3.3V) Positive power supply of the HSTL outputs. All VCCO pins must be connected to the postive power supply (1.5V or 1.8V) for correct DC and AC operation.
Table 2. FUNCTION TABLE
Control CLK_SEL OE Default 0 0 0 CLK0, CLK0 (HSTL) is the active differential clock input Q[0-9], Q[0-9] are active. Deassertion of OE can be asynchronous to the reference clock without generation of output runt pulses. CLK1, CLK1 (PECL) is the active differential clock input Q[0-9] = L, Q[0-9] =H (outputs disabled). Assertion of OE can be asynchronous to the reference clock without generation of output runt pulses.
MOTOROLA
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CLK1
VCC
OE
OE
TIMING SOLUTIONS
MC100ES8111
Table 3. Absolute Maximum Ratingsa
Symbol VCC VCCO VIN VOUT IIN IOUT TS Supply Voltage Supply Voltage DC Input Voltage DC Output Voltage DC Input Current DC Output Current Storage temperature -65 Characteristics Min -0.3 -0.3 -0.3 -0.3 Max 3.6 3.1 VCC + 0.3 VCC + 0.3 20 50 125 Unit V V V V mA mA C Condition
TFunc Functional temperature range TA = -40 TJ = +110 C a. Absolute maximum continuous ratings are those maximum values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation at absolute-maximum-rated conditions is not implied.
Table 4. General Specifications
Symbol VTT MM HBM CDM LU CIN JA Characteristics Output termination voltage ESD Protection (Machine model) ESD Protection (Human body model) ESD Protection (Charged device model) Latch-up immunity Input Capacitance Thermal resistance junction to ambient JESD 51-3, single layer test board 200 2000 TBD 200 4.0 83.1 73.3 68.9 63.8 57.4 59.0 54.4 52.5 50.4 47.8 23.0 86.0 75.4 70.9 65.3 59.6 60.6 55.7 53.8 51.5 48.8 26.3 Min Typ 0 Max Unit V V V V mA pF C/W C/W C/W C/W C/W C/W C/W C/W C/W C/W C/W Inputs Natural convection 100 ft/min 200 ft/min 400 ft/min 800 ft/min Natural convection 100 ft/min 200 ft/min 400 ft/min 800 ft/min MIL-SPEC 883E Method 1012.1 Condition
JESD 51-6, 2S2P multilayer test board
JC TJ
Thermal resistance junction to case Operating junction temperaturea (continuous operation)
MTBF = 9.1 years
110
C
a. Operating junction temperature impacts device life time. Maximum continues operating junction temperature should be selected according to the application life time requirements (See application note AN1545 and the application section in this datasheet for more information). The device AC and DC parameters are specified up to 110C junction temperature allowing the MC100ES8111 to be used in applications requiring industrial temperature range. It is recommended that users of the MC100ES8111 employ thermal modeling analysis to assist in applying the junction temperature specifications to their particular application.
TIMING SOLUTIONS
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MOTOROLA
MC100ES8111
Table 5. DC Characteristics (VCC = 3.3V5%, VCCO=1.5V0.1V or VCCO=1.8V0.1V, TJ = 0C to + 110C)a
Symbol Characteristics Min Typ Max Unit Condition Clock input pair CLK0, CLK0 (HSTL differential signals) VDIF Differential input voltageb VX, IN VIH VIL IIN Differential cross point voltagec Input high voltage Input low voltage Input Current
0.2 0.25 VX+0.1 VX-0.1 150 0.68 - 0.9 VCC-1.3
V V V V mA VIN = VX 0.1V Differential operation Differential operation
Clock input pair CLK1, CLK1 (PECL differential signals) VPP Differential input voltaged VCMR VIH VIL IIN VIL VIH IIN VX,OUT VOH VOL ICC ICCOf Differential cross point voltagee Input voltage high Input voltage low Input Currenta
0.15 1.0 VCC-1.165 VCC-1.810
1.0 VCC-0.6 VCC-0.880 VCC-1.475 150
V V V V mA
VIN = VIH or VIN
LVCMOS control inputs OE, CLK_SEL Input voltage low Input voltage high Input Current 2.0 150 0.8 V V mA VIN = VIH or VIN
HSTL clock outputs (Q[0-9], Q[0-9]) Output differential crosspoint Output High Voltage Output Low Voltage 0.68 1 0.4 0.75 0.9 V V V
Supply current Maximum Quiescent Supply Current without output termination current Maximum Quiescent Supply Current, outputs terminated 50W to VTT 100 TBD TBD TBD mA mA VCC pin (core) VCCO pins (outputs)
a. DC characteristics are design targets and pending characterization. b. VDIF (DC) is the minimum differential HSTL input voltage swing required for device functionality. c. VX (DC) is the crosspoint of the differential HSTL input signal. Functional operation is obtained when the crosspoint is within the VX (DC) range and the input swing lies within the VPP (DC) specification. d. VPP (DC) is the minimum differential input voltage swing required to maintain device functionality. e. VCMR (DC) is the crosspoint of the differential input signal. Functional operation is obtained when the crosspoint is within the VCMR (DC) range and the input swing lies within the VPP (DC) specification. f. ICC includes current through the output resistors (all outputs terminated to VTT).
MOTOROLA
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TIMING SOLUTIONS
MC100ES8111
Table 6. AC Characteristics (VCC = 3.3V5%, VCCO = 1.5V0.1V or VCCO = 1.8V0.1V, TJ = 0C to + 110C) a b
Symbol Characteristics Min 0.4 0.68 0-400 0.9 TBD TBD 0.2 1 0-400 TBD 0.68 1 0.5 0.5 50 TBD TBD TBD 0.05 2.5T + tPD 3T + tPD 50 TBD TBD 3.5T + tPD 4T + tPD % ns ns ns DCfref= 50% 20% to 80% T=CLK period T=CLK period 0.75 0.9 1.0 VCC-0.6 Typ Max Unit V V MHz ps V V MHz ps V V V V ps ps Differential Differential Differential Differential Condition Clock input pair CLK0, CLK0 (HSTL differential signals) VDIF Differential input voltagec (peak-to-peak) VX, IN fCLK Differential cross point voltaged Input Frequency
tPD Propagation Delay CLK0 to Q[0-9] Clock input pair CLK1, CLK1 (PECL differential signals) VPP Differential input voltagee (peak-to-peak) VCMR fCLK Differential input crosspoint voltagef Input Frequency
tPD Propagation Delay CLK1 to Q[0-9] HSTL clock outputs (Q[0-9], Q[0-9]) VX,OUT VOH VOL VO(P-P) tsk(O) tsk(PP) tJIT(CC) DCO tr, tf tPDLg tPLDh a. b. c. d. e. f. Output differential crosspoint Output High Voltage Output Low Voltage Differential output voltage (peak-to-peak) Output-to-output skew Output-to-output skew (part-to-part) Output cycle-to-cycle jitter Output duty cycle Output Rise/Fall Time Output disable time Output enable time
g. h.
AC characteristics are design targets and pending characterization. AC characteristics apply for parallel output termination of 50 to VTT. VDIF (DC) is the minimum differential HSTL input voltage swing required for device functionality. VX (DC) is the crosspoint of the differential HSTL input signal. Functional operation is obtained when the crosspoint is within the VX (DC) range and the input swing lies within the VDIF (DC) specification. VPP (AC) is the minimum differential PECL input voltage swing required to maintain AC characteristics including tpd and device-to-device skew. VCMR (AC) is the crosspoint of the differential HSTL input signal. Normal AC operation is obtained when the crosspoint is within the VCMR (AC) range and the input swing lies within the VPP (AC) specification. Violation of VCMR (AC) or VPP (AC) impacts the device propagation delay, device and part-to-part skew. Propagation delay OE deassertion to differential output disabled (differential low: true output low, complementary output high). Propagation delay OE assertion to output enabled (active).
TIMING SOLUTIONS
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MOTOROLA
MC100ES8111
CLKx CLKx
50% OE tPDL (OE to Qx[]) tPLD (OE to Qx[]) Outputs disabled
Qx[] Qx[]
Figure 1. MC100ES8111 AC test reference
Differential Pulse Generator Z = 50W
ZO = 50
ZO = 50
RT = 50 VTT=GND
DUT MC100ES8111
RT = 50 VTT=GND
Figure 2. MC100ES8111 AC test reference
CLK0,1 CLK0,1
VDIF=1.0V
CLK0,1 VX=0.75V CLK0,1
VPP=0.8V
VCMR=VCC-1.3V
Q[0-9]
Q[0-9]
Q[0-9] tPD (CLK0,1 to Q[0-9])
Q[0-9] tPD (CLK0,1 to Q[0-9])
Figure 3. MC100ES8111 AC reference measurement waveform (HSTL input)
Figure 4. MC100ES8111 AC reference measurement waveform (PECL input)
MOTOROLA
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TIMING SOLUTIONS
MC100ES8111
OUTLINE DIMENSIONS
FA SUFFIX LQFP PACKAGE CASE 873A-02 ISSUE A
A A1
32 25 4X
0.20 (0.008) AB T-U Z
1
-T- B B1
8
-U- V P DETAIL Y
17
AE
V1 AE DETAIL Y
9
-Z- 9 S1 S
4X
0.20 (0.008) AC T-U Z
G -AB-
SEATING PLANE
DETAIL AD
-AC-
BASE METAL
F
8X
M_ R
CE
SECTION AE-AE
X DETAIL AD
TIMING SOLUTIONS
GAUGE PLANE
0.250 (0.010)
H
W
K
Q_
7
EE EE EE EE
N
D
0.20 (0.008)
M
AC T-U Z
0.10 (0.004) AC
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DATUM PLANE -AB- IS LOCATED AT BOTTOM OF LEAD AND IS COINCIDENT WITH THE LEAD WHERE THE LEAD EXITS THE PLASTIC BODY AT THE BOTTOM OF THE PARTING LINE. 4. DATUMS -T-, -U-, AND -Z- TO BE DETERMINED AT DATUM PLANE -AB-. 5. DIMENSIONS S AND V TO BE DETERMINED AT SEATING PLANE -AC-. 6. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE PROTRUSION IS 0.250 (0.010) PER SIDE. DIMENSIONS A AND B DO INCLUDE MOLD MISMATCH AND ARE DETERMINED AT DATUM PLANE -AB-. 7. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. DAMBAR PROTRUSION SHALL NOT CAUSE THE D DIMENSION TO EXCEED 0.520 (0.020). 8. MINIMUM SOLDER PLATE THICKNESS SHALL BE 0.0076 (0.0003). 9. EXACT SHAPE OF EACH CORNER MAY VARY FROM DEPICTION. MILLIMETERS MIN MAX 7.000 BSC 3.500 BSC 7.000 BSC 3.500 BSC 1.400 1.600 0.300 0.450 1.350 1.450 0.300 0.400 0.800 BSC 0.050 0.150 0.090 0.200 0.500 0.700 12_ REF 0.090 0.160 0.400 BSC 1_ 5_ 0.150 0.250 9.000 BSC 4.500 BSC 9.000 BSC 4.500 BSC 0.200 REF 1.000 REF INCHES MIN MAX 0.276 BSC 0.138 BSC 0.276 BSC 0.138 BSC 0.055 0.063 0.012 0.018 0.053 0.057 0.012 0.016 0.031 BSC 0.002 0.006 0.004 0.008 0.020 0.028 12_ REF 0.004 0.006 0.016 BSC 1_ 5_ 0.006 0.010 0.354 BSC 0.177 BSC 0.354 BSC 0.177 BSC 0.008 REF 0.039 REF
J
DIM A A1 B B1 C D E F G H J K M N P Q R S S1 V V1 W X
-T-, -U-, -Z- MOTOROLA
MC100ES8111
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. MOTOROLA and the logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners.
E Motorola, Inc. 2002.
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MC100ES8111/D TIMING SOLUTIONS

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